Add support for aarch64 CPUFeatures (#42902)
Extend real_has_cpu_with_flag to support aarch64 CPU Features using hwcaps. With this PR, users can find out if their Arm system supports architecture-specific features such as BTI as follows: ``` $ systemd-analyze condition 'ConditionCPUFeature=bti' ```
This commit is contained in:
Lennart Poettering
+25
-5
@@ -1988,11 +1988,10 @@
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<varlistentry>
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<term><varname>ConditionCPUFeature=</varname></term>
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<listitem><para>Verify that a given CPU feature is available via the <literal>CPUID</literal>
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instruction. This condition only does something on i386 and x86-64 processors. On other
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processors it is assumed that the CPU does not support the given feature. It checks the leaves
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<literal>1</literal>, <literal>7</literal>, <literal>0x80000001</literal>, and
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<literal>0x80000007</literal>. Valid values are:
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<listitem><para>On i386 and x86-64, verify that a given CPU feature is available via the
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<literal>CPUID</literal> instruction. It checks the leaves <literal>1</literal>,
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<literal>7</literal>, <literal>0x80000001</literal>, and <literal>0x80000007</literal>. Valid
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values are:
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<literal>fpu</literal>,
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<literal>vme</literal>,
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<literal>de</literal>,
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@@ -2045,6 +2044,27 @@
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<literal>abm</literal>,
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<literal>constant_tsc</literal>.</para>
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<para>On arm64, valid values are the corresponding arm64 feature names,
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such as
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<literal>asimd</literal>,
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<literal>paca</literal>,
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<literal>pacg</literal>,
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<literal>bti</literal>,
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<literal>mte</literal>,
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among others. For the full list, see the documentation on
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<ulink url="https://docs.kernel.org/arch/arm64/elf_hwcaps.html">ARM64 ELF hwcaps</ulink>.</para>
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<para>To avoid ambiguities in mixed-architecture fleets, the value can be prefixed
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with the architecture name using the form <literal>ARCH.FEATURE</literal>. If the
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architecture prefix does not match the running system, the condition evaluates
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to false. For example, one can specify <literal>arm64.bti</literal> on arm64
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systems to check if <literal>bti</literal> is supported. In this example,
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<literal>ConditionCPUFeature=arm64.bti</literal> and
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<literal>ConditionCPUFeature=bti</literal> are functionally equivalent.
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See <varname>ConditionArchitecture=</varname> for valid architecture names.</para>
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<para>On architectures other than x86 and arm64, it is assumed that the CPU does not support the given feature.</para>
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<xi:include href="version-info.xml" xpointer="v248"/>
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</listitem>
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</varlistentry>
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+178
-2
@@ -3,6 +3,9 @@
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#if defined(__i386__) || defined(__x86_64__)
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#include <cpuid.h>
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#endif
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#if defined(__aarch64__)
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#include <sys/auxv.h>
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#endif
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#include <stdlib.h>
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#include <threads.h>
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#include <unistd.h>
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@@ -951,9 +954,182 @@ static bool real_has_cpu_with_flag(const char *flag) {
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}
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#endif
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#if defined(__aarch64__)
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struct hwcap_table_entry {
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uint64_t flag_mask;
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const char *name;
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};
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static const struct hwcap_table_entry hwcap[] = {
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{ HWCAP_FP, "fp" },
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{ HWCAP_ASIMD, "asimd" },
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{ HWCAP_EVTSTRM, "evtstrm" },
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{ HWCAP_AES, "aes" },
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{ HWCAP_PMULL, "pmull" },
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{ HWCAP_SHA1, "sha1" },
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{ HWCAP_SHA2, "sha2" },
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{ HWCAP_CRC32, "crc32" },
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{ HWCAP_ATOMICS, "atomics" },
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{ HWCAP_FPHP, "fphp" },
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{ HWCAP_ASIMDHP, "asimdhp" },
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{ HWCAP_CPUID, "cpuid" },
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{ HWCAP_ASIMDRDM, "asimdrdm" },
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{ HWCAP_JSCVT, "jscvt" },
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{ HWCAP_FCMA, "fcma" },
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{ HWCAP_LRCPC, "lrcpc" },
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{ HWCAP_DCPOP, "dcpop" },
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{ HWCAP_SHA3, "sha3" },
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{ HWCAP_SM3, "sm3" },
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{ HWCAP_SM4, "sm4" },
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{ HWCAP_ASIMDDP, "asimddp" },
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{ HWCAP_SHA512, "sha512" },
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{ HWCAP_SVE, "sve" },
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{ HWCAP_ASIMDFHM, "asimdfhm" },
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{ HWCAP_DIT, "dit" },
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{ HWCAP_USCAT, "uscat" },
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{ HWCAP_ILRCPC, "ilrcpc" },
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{ HWCAP_FLAGM, "flagm" },
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{ HWCAP_SSBS, "ssbs" },
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{ HWCAP_SB, "sb" },
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{ HWCAP_PACA, "paca" },
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{ HWCAP_PACG, "pacg" },
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{ HWCAP_GCS, "gcs" },
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{ HWCAP_CMPBR, "cmpbr" },
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{ HWCAP_FPRCVT, "fprcvt" },
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{ HWCAP_F8MM8, "f8mm8" },
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{ HWCAP_F8MM4, "f8mm4" },
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{ HWCAP_SVE_F16MM, "svef16mm" },
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{ HWCAP_SVE_ELTPERM, "sveeltperm" },
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{ HWCAP_SVE_AES2, "sveaes2" },
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{ HWCAP_SVE_BFSCALE, "svebfscale" },
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{ HWCAP_SVE2P2, "sve2p2" },
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{ HWCAP_SME2P2, "sme2p2" },
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{ HWCAP_SME_SBITPERM, "smesbitperm" },
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{ HWCAP_SME_AES, "smeaes" },
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{ HWCAP_SME_SFEXPA, "smesfexpa" },
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{ HWCAP_SME_STMOP, "smestmop" },
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{ HWCAP_SME_SMOP4, "smesmop4" },
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};
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static const struct hwcap_table_entry hwcap2[] = {
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{ HWCAP2_DCPODP, "dcpodp" },
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{ HWCAP2_SVE2, "sve2" },
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{ HWCAP2_SVEAES, "sveaes" },
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{ HWCAP2_SVEPMULL, "svepmull" },
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{ HWCAP2_SVEBITPERM, "svebitperm" },
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{ HWCAP2_SVESHA3, "svesha3" },
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{ HWCAP2_SVESM4, "svesm4" },
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{ HWCAP2_FLAGM2, "flagm2" },
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{ HWCAP2_FRINT, "frint" },
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{ HWCAP2_SVEI8MM, "svei8mm" },
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{ HWCAP2_SVEF32MM, "svef32mm" },
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{ HWCAP2_SVEF64MM, "svef64mm" },
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{ HWCAP2_SVEBF16, "svebf16" },
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{ HWCAP2_I8MM, "i8mm" },
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{ HWCAP2_BF16, "bf16" },
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{ HWCAP2_DGH, "dgh" },
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{ HWCAP2_RNG, "rng" },
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{ HWCAP2_BTI, "bti" },
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{ HWCAP2_MTE, "mte" },
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{ HWCAP2_ECV, "ecv" },
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{ HWCAP2_AFP, "afp" },
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{ HWCAP2_RPRES, "rpres" },
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{ HWCAP2_MTE3, "mte3" },
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{ HWCAP2_SME, "sme" },
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{ HWCAP2_SME_I16I64, "smei16i64" },
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{ HWCAP2_SME_F64F64, "smef64f64" },
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{ HWCAP2_SME_I8I32, "smei8i32" },
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{ HWCAP2_SME_F16F32, "smef16f32" },
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{ HWCAP2_SME_B16F32, "smeb16f32" },
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{ HWCAP2_SME_F32F32, "smef32f32" },
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{ HWCAP2_SME_FA64, "smefa64" },
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{ HWCAP2_WFXT, "wfxt" },
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{ HWCAP2_EBF16, "ebf16" },
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{ HWCAP2_SVE_EBF16, "sveebf16" },
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{ HWCAP2_CSSC, "cssc" },
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{ HWCAP2_RPRFM, "rprfm" },
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{ HWCAP2_SVE2P1, "sve2p1" },
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{ HWCAP2_SME2, "sme2" },
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{ HWCAP2_SME2P1, "sme2p1" },
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{ HWCAP2_SME_I16I32, "smei16i32" },
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{ HWCAP2_SME_BI32I32, "smebi32i32" },
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{ HWCAP2_SME_B16B16, "smeb16b16" },
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{ HWCAP2_SME_F16F16, "smef16f16" },
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{ HWCAP2_MOPS, "mops" },
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{ HWCAP2_HBC, "hbc" },
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{ HWCAP2_SVE_B16B16, "sveb16b16" },
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{ HWCAP2_LRCPC3, "lrcpc3" },
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{ HWCAP2_LSE128, "lse128" },
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{ HWCAP2_FPMR, "fpmr" },
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{ HWCAP2_LUT, "lut" },
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{ HWCAP2_FAMINMAX, "faminmax" },
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{ HWCAP2_F8CVT, "f8cvt" },
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{ HWCAP2_F8FMA, "f8fma" },
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{ HWCAP2_F8DP4, "f8dp4" },
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{ HWCAP2_F8DP2, "f8dp2" },
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{ HWCAP2_F8E4M3, "f8e4m3" },
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{ HWCAP2_F8E5M2, "f8e5m2" },
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{ HWCAP2_SME_LUTV2, "smelutv2" },
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{ HWCAP2_SME_F8F16, "smef8f16" },
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{ HWCAP2_SME_F8F32, "smef8f32" },
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{ HWCAP2_SME_SF8FMA, "smesf8fma" },
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{ HWCAP2_SME_SF8DP4, "smesf8dp4" },
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{ HWCAP2_SME_SF8DP2, "smesf8dp2" },
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{ HWCAP2_POE, "poe" },
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};
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static const struct hwcap_table_entry hwcap3[] = {
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{ HWCAP3_MTE_FAR, "mtefar" },
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{ HWCAP3_MTE_STORE_ONLY, "mtestoreonly" },
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{ HWCAP3_LSFE, "lsfe" },
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{ HWCAP3_LS64, "ls64" },
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{ HWCAP3_SVE_B16MM, "sveb16mm" },
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{ HWCAP3_SVE2P3, "sve2p3" },
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{ HWCAP3_SME_LUT6, "smelut6" },
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{ HWCAP3_SME2P3, "sme2p3" },
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{ HWCAP3_F16MM, "f16mm" },
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{ HWCAP3_F16F32DOT, "f16f32dot" },
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{ HWCAP3_F16F32MM, "f16f32mm" },
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{ HWCAP3_SVE_LUT6, "svelut6" },
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};
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static bool given_flag_in_hwcap_set(
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const char *flag,
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const struct hwcap_table_entry *set,
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size_t set_size,
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unsigned long val) {
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assert(set);
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for (size_t i = 0; i < set_size; i++)
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if ((set[i].flag_mask & val) && streq(flag, set[i].name))
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return true;
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return false;
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}
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static bool real_has_cpu_with_flag(const char *flag) {
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unsigned long val;
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val = getauxval(AT_HWCAP);
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if (given_flag_in_hwcap_set(flag, hwcap, ELEMENTSOF(hwcap), val))
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return true;
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val = getauxval(AT_HWCAP2);
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if (given_flag_in_hwcap_set(flag, hwcap2, ELEMENTSOF(hwcap2), val))
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return true;
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val = getauxval(AT_HWCAP3);
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if (given_flag_in_hwcap_set(flag, hwcap3, ELEMENTSOF(hwcap3), val))
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return true;
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return false;
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}
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#endif
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bool has_cpu_with_flag(const char *flag) {
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/* CPUID is an x86 specific interface. Assume on all others that no CPUs have those flags. */
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#if defined(__i386__) || defined(__x86_64__)
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/* Check the architecture-specific CPU feature interface when available. */
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#if defined(__i386__) || defined(__x86_64__) || defined(__aarch64__)
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return real_has_cpu_with_flag(flag);
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#else
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return false;
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@@ -0,0 +1,9 @@
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/* SPDX-License-Identifier: LGPL-2.1-or-later */
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#pragma once
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#include_next <elf.h> /* IWYU pragma: export */
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/* AT_HWCAP3 was added in glibc 2.39. */
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#ifndef AT_HWCAP3
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#define AT_HWCAP3 29
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#endif
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@@ -0,0 +1,229 @@
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/* SPDX-License-Identifier: LGPL-2.1-or-later */
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#pragma once
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#include_next <bits/hwcap.h> /* IWYU pragma: export */
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/* All other capabilities are defined in glibc-2.34 / musl 1.2.6 or earlier */
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#if defined(__aarch64__)
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#ifndef HWCAP_GCS
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#define HWCAP_GCS (1UL << 32)
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#endif
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#ifndef HWCAP_CMPBR
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#define HWCAP_CMPBR (1UL << 33)
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#endif
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#ifndef HWCAP_FPRCVT
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#define HWCAP_FPRCVT (1UL << 34)
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#endif
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#ifndef HWCAP_F8MM8
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#define HWCAP_F8MM8 (1UL << 35)
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#endif
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#ifndef HWCAP_F8MM4
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#define HWCAP_F8MM4 (1UL << 36)
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#endif
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#ifndef HWCAP_SVE_F16MM
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#define HWCAP_SVE_F16MM (1UL << 37)
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#endif
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#ifndef HWCAP_SVE_ELTPERM
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#define HWCAP_SVE_ELTPERM (1UL << 38)
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#endif
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#ifndef HWCAP_SVE_AES2
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#define HWCAP_SVE_AES2 (1UL << 39)
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#endif
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#ifndef HWCAP_SVE_BFSCALE
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#define HWCAP_SVE_BFSCALE (1UL << 40)
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#endif
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#ifndef HWCAP_SVE2P2
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#define HWCAP_SVE2P2 (1UL << 41)
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#endif
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#ifndef HWCAP_SME2P2
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#define HWCAP_SME2P2 (1UL << 42)
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#endif
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#ifndef HWCAP_SME_SBITPERM
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#define HWCAP_SME_SBITPERM (1UL << 43)
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#endif
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#ifndef HWCAP_SME_AES
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#define HWCAP_SME_AES (1UL << 44)
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#endif
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#ifndef HWCAP_SME_SFEXPA
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#define HWCAP_SME_SFEXPA (1UL << 45)
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#endif
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#ifndef HWCAP_SME_STMOP
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#define HWCAP_SME_STMOP (1UL << 46)
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#endif
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#ifndef HWCAP_SME_SMOP4
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#define HWCAP_SME_SMOP4 (1UL << 47)
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#endif
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#ifndef HWCAP2_ECV
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#define HWCAP2_ECV (1 << 19)
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#endif
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#ifndef HWCAP2_AFP
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#define HWCAP2_AFP (1 << 20)
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#endif
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#ifndef HWCAP2_RPRES
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#define HWCAP2_RPRES (1 << 21)
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#endif
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#ifndef HWCAP2_MTE3
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#define HWCAP2_MTE3 (1 << 22)
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#endif
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#ifndef HWCAP2_SME
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#define HWCAP2_SME (1 << 23)
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#endif
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#ifndef HWCAP2_SME_I16I64
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#define HWCAP2_SME_I16I64 (1 << 24)
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#endif
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#ifndef HWCAP2_SME_F64F64
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#define HWCAP2_SME_F64F64 (1 << 25)
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#endif
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#ifndef HWCAP2_SME_I8I32
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#define HWCAP2_SME_I8I32 (1 << 26)
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#endif
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#ifndef HWCAP2_SME_F16F32
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#define HWCAP2_SME_F16F32 (1 << 27)
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#endif
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#ifndef HWCAP2_SME_B16F32
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#define HWCAP2_SME_B16F32 (1 << 28)
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#endif
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#ifndef HWCAP2_SME_F32F32
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#define HWCAP2_SME_F32F32 (1 << 29)
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#endif
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#ifndef HWCAP2_SME_FA64
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#define HWCAP2_SME_FA64 (1 << 30)
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#endif
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#ifndef HWCAP2_WFXT
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#define HWCAP2_WFXT (1UL << 31)
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#endif
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#ifndef HWCAP2_EBF16
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#define HWCAP2_EBF16 (1UL << 32)
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#endif
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#ifndef HWCAP2_SVE_EBF16
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#define HWCAP2_SVE_EBF16 (1UL << 33)
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#endif
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#ifndef HWCAP2_CSSC
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#define HWCAP2_CSSC (1UL << 34)
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#endif
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#ifndef HWCAP2_RPRFM
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#define HWCAP2_RPRFM (1UL << 35)
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#endif
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#ifndef HWCAP2_SVE2P1
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#define HWCAP2_SVE2P1 (1UL << 36)
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#endif
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#ifndef HWCAP2_SME2
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#define HWCAP2_SME2 (1UL << 37)
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#endif
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#ifndef HWCAP2_SME2P1
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#define HWCAP2_SME2P1 (1UL << 38)
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#endif
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#ifndef HWCAP2_SME_I16I32
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#define HWCAP2_SME_I16I32 (1UL << 39)
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#endif
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#ifndef HWCAP2_SME_BI32I32
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#define HWCAP2_SME_BI32I32 (1UL << 40)
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#endif
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#ifndef HWCAP2_SME_B16B16
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#define HWCAP2_SME_B16B16 (1UL << 41)
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#endif
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#ifndef HWCAP2_SME_F16F16
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#define HWCAP2_SME_F16F16 (1UL << 42)
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#endif
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#ifndef HWCAP2_MOPS
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#define HWCAP2_MOPS (1UL << 43)
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#endif
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#ifndef HWCAP2_HBC
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#define HWCAP2_HBC (1UL << 44)
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#endif
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#ifndef HWCAP2_SVE_B16B16
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#define HWCAP2_SVE_B16B16 (1UL << 45)
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#endif
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#ifndef HWCAP2_LRCPC3
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#define HWCAP2_LRCPC3 (1UL << 46)
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#endif
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#ifndef HWCAP2_LSE128
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#define HWCAP2_LSE128 (1UL << 47)
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#endif
|
||||
#ifndef HWCAP2_FPMR
|
||||
#define HWCAP2_FPMR (1UL << 48)
|
||||
#endif
|
||||
#ifndef HWCAP2_LUT
|
||||
#define HWCAP2_LUT (1UL << 49)
|
||||
#endif
|
||||
#ifndef HWCAP2_FAMINMAX
|
||||
#define HWCAP2_FAMINMAX (1UL << 50)
|
||||
#endif
|
||||
#ifndef HWCAP2_F8CVT
|
||||
#define HWCAP2_F8CVT (1UL << 51)
|
||||
#endif
|
||||
#ifndef HWCAP2_F8FMA
|
||||
#define HWCAP2_F8FMA (1UL << 52)
|
||||
#endif
|
||||
#ifndef HWCAP2_F8DP4
|
||||
#define HWCAP2_F8DP4 (1UL << 53)
|
||||
#endif
|
||||
#ifndef HWCAP2_F8DP2
|
||||
#define HWCAP2_F8DP2 (1UL << 54)
|
||||
#endif
|
||||
#ifndef HWCAP2_F8E4M3
|
||||
#define HWCAP2_F8E4M3 (1UL << 55)
|
||||
#endif
|
||||
#ifndef HWCAP2_F8E5M2
|
||||
#define HWCAP2_F8E5M2 (1UL << 56)
|
||||
#endif
|
||||
#ifndef HWCAP2_SME_LUTV2
|
||||
#define HWCAP2_SME_LUTV2 (1UL << 57)
|
||||
#endif
|
||||
#ifndef HWCAP2_SME_F8F16
|
||||
#define HWCAP2_SME_F8F16 (1UL << 58)
|
||||
#endif
|
||||
#ifndef HWCAP2_SME_F8F32
|
||||
#define HWCAP2_SME_F8F32 (1UL << 59)
|
||||
#endif
|
||||
#ifndef HWCAP2_SME_SF8FMA
|
||||
#define HWCAP2_SME_SF8FMA (1UL << 60)
|
||||
#endif
|
||||
#ifndef HWCAP2_SME_SF8DP4
|
||||
#define HWCAP2_SME_SF8DP4 (1UL << 61)
|
||||
#endif
|
||||
#ifndef HWCAP2_SME_SF8DP2
|
||||
#define HWCAP2_SME_SF8DP2 (1UL << 62)
|
||||
#endif
|
||||
#ifndef HWCAP2_POE
|
||||
#define HWCAP2_POE (1UL << 63)
|
||||
#endif
|
||||
|
||||
#ifndef HWCAP3_MTE_FAR
|
||||
#define HWCAP3_MTE_FAR (1UL << 0)
|
||||
#endif
|
||||
#ifndef HWCAP3_MTE_STORE_ONLY
|
||||
#define HWCAP3_MTE_STORE_ONLY (1UL << 1)
|
||||
#endif
|
||||
#ifndef HWCAP3_LSFE
|
||||
#define HWCAP3_LSFE (1UL << 2)
|
||||
#endif
|
||||
#ifndef HWCAP3_LS64
|
||||
#define HWCAP3_LS64 (1UL << 3)
|
||||
#endif
|
||||
#ifndef HWCAP3_SVE_B16MM
|
||||
#define HWCAP3_SVE_B16MM (1UL << 4)
|
||||
#endif
|
||||
#ifndef HWCAP3_SVE2P3
|
||||
#define HWCAP3_SVE2P3 (1UL << 5)
|
||||
#endif
|
||||
#ifndef HWCAP3_SME_LUT6
|
||||
#define HWCAP3_SME_LUT6 (1UL << 6)
|
||||
#endif
|
||||
#ifndef HWCAP3_SME2P3
|
||||
#define HWCAP3_SME2P3 (1UL << 7)
|
||||
#endif
|
||||
#ifndef HWCAP3_F16MM
|
||||
#define HWCAP3_F16MM (1UL << 8)
|
||||
#endif
|
||||
#ifndef HWCAP3_F16F32DOT
|
||||
#define HWCAP3_F16F32DOT (1UL << 9)
|
||||
#endif
|
||||
#ifndef HWCAP3_F16F32MM
|
||||
#define HWCAP3_F16F32MM (1UL << 10)
|
||||
#endif
|
||||
#ifndef HWCAP3_SVE_LUT6
|
||||
#define HWCAP3_SVE_LUT6 (1UL << 11)
|
||||
#endif
|
||||
#endif
|
||||
+28
-7
@@ -516,21 +516,19 @@ static int condition_test_virtualization(Condition *c, char **env) {
|
||||
return v != VIRTUALIZATION_NONE && streq(c->parameter, virtualization_to_string(v));
|
||||
}
|
||||
|
||||
static int condition_test_architecture(Condition *c, char **env) {
|
||||
static int condition_test_architecture_parameter(const char *parameter) {
|
||||
Architecture a, b;
|
||||
|
||||
assert(c);
|
||||
assert(c->parameter);
|
||||
assert(c->type == CONDITION_ARCHITECTURE);
|
||||
assert(parameter);
|
||||
|
||||
a = uname_architecture();
|
||||
if (a < 0)
|
||||
return a;
|
||||
|
||||
if (streq(c->parameter, "native"))
|
||||
if (streq(parameter, "native"))
|
||||
b = native_architecture();
|
||||
else {
|
||||
b = architecture_from_string(c->parameter);
|
||||
b = architecture_from_string(parameter);
|
||||
if (b < 0) /* unknown architecture? Then it's definitely not ours */
|
||||
return false;
|
||||
}
|
||||
@@ -538,6 +536,14 @@ static int condition_test_architecture(Condition *c, char **env) {
|
||||
return a == b;
|
||||
}
|
||||
|
||||
static int condition_test_architecture(Condition *c, char **env) {
|
||||
assert(c);
|
||||
assert(c->parameter);
|
||||
assert(c->type == CONDITION_ARCHITECTURE);
|
||||
|
||||
return condition_test_architecture_parameter(c->parameter);
|
||||
}
|
||||
|
||||
#define DTCOMPAT_FILE "/proc/device-tree/compatible"
|
||||
static int condition_test_firmware_devicetree_compatible(const char *dtcarg) {
|
||||
int r;
|
||||
@@ -1080,11 +1086,26 @@ static int condition_test_path_is_read_write(Condition *c, char **env) {
|
||||
}
|
||||
|
||||
static int condition_test_cpufeature(Condition *c, char **env) {
|
||||
_cleanup_free_ char *cpu_arch = NULL, *feature = NULL;
|
||||
int r;
|
||||
|
||||
assert(c);
|
||||
assert(c->parameter);
|
||||
assert(c->type == CONDITION_CPU_FEATURE);
|
||||
|
||||
return has_cpu_with_flag(ascii_strlower(c->parameter));
|
||||
r = split_pair(c->parameter, ".", &cpu_arch, &feature);
|
||||
if (r >= 0) {
|
||||
r = condition_test_architecture_parameter(cpu_arch);
|
||||
if (r <= 0)
|
||||
return r;
|
||||
} else if (r == -EINVAL) {
|
||||
feature = strdup(c->parameter);
|
||||
if (!feature)
|
||||
return -ENOMEM;
|
||||
} else
|
||||
return r;
|
||||
|
||||
return has_cpu_with_flag(ascii_strlower(feature));
|
||||
}
|
||||
|
||||
static int condition_test_path_is_encrypted(Condition *c, char **env) {
|
||||
|
||||
@@ -846,14 +846,52 @@ TEST(condition_test_credential) {
|
||||
ASSERT_OK(set_unset_env("ENCRYPTED_CREDENTIALS_DIRECTORY", d2, /* overwrite= */ true));
|
||||
}
|
||||
|
||||
#if defined(__i386__) || defined(__x86_64__)
|
||||
#if defined(__i386__) || defined(__x86_64__) || defined(__aarch64__)
|
||||
TEST(condition_test_cpufeature) {
|
||||
Condition *condition;
|
||||
|
||||
#if defined(__i386__)
|
||||
ASSERT_NOT_NULL((condition = condition_new(CONDITION_CPU_FEATURE, "fpu", false, false)));
|
||||
ASSERT_OK_POSITIVE(condition_test(condition, environ));
|
||||
condition_free(condition);
|
||||
|
||||
ASSERT_NOT_NULL((condition = condition_new(CONDITION_CPU_FEATURE, "x86.fpu", false, false)));
|
||||
ASSERT_OK_POSITIVE(condition_test(condition, environ));
|
||||
condition_free(condition);
|
||||
|
||||
ASSERT_NOT_NULL((condition = condition_new(CONDITION_CPU_FEATURE, "bogus.fpu", false, false)));
|
||||
ASSERT_OK_ZERO(condition_test(condition, environ));
|
||||
condition_free(condition);
|
||||
#elif defined(__x86_64__)
|
||||
ASSERT_NOT_NULL((condition = condition_new(CONDITION_CPU_FEATURE, "fpu", false, false)));
|
||||
ASSERT_OK_POSITIVE(condition_test(condition, environ));
|
||||
condition_free(condition);
|
||||
|
||||
ASSERT_NOT_NULL((condition = condition_new(CONDITION_CPU_FEATURE, "x86-64.fpu", false, false)));
|
||||
ASSERT_OK_POSITIVE(condition_test(condition, environ));
|
||||
condition_free(condition);
|
||||
|
||||
ASSERT_NOT_NULL((condition = condition_new(CONDITION_CPU_FEATURE, "bogus.fpu", false, false)));
|
||||
ASSERT_OK_ZERO(condition_test(condition, environ));
|
||||
condition_free(condition);
|
||||
#elif defined(__aarch64__)
|
||||
ASSERT_NOT_NULL((condition = condition_new(CONDITION_CPU_FEATURE, "fp", false, false)));
|
||||
ASSERT_OK_POSITIVE(condition_test(condition, environ));
|
||||
condition_free(condition);
|
||||
|
||||
ASSERT_NOT_NULL((condition = condition_new(CONDITION_CPU_FEATURE, "asimd", false, false)));
|
||||
ASSERT_OK_POSITIVE(condition_test(condition, environ));
|
||||
condition_free(condition);
|
||||
|
||||
ASSERT_NOT_NULL((condition = condition_new(CONDITION_CPU_FEATURE, "arm64.asimd", false, false)));
|
||||
ASSERT_OK_POSITIVE(condition_test(condition, environ));
|
||||
condition_free(condition);
|
||||
|
||||
ASSERT_NOT_NULL((condition = condition_new(CONDITION_CPU_FEATURE, "bogus.asimd", false, false)));
|
||||
ASSERT_OK_ZERO(condition_test(condition, environ));
|
||||
condition_free(condition);
|
||||
#endif
|
||||
|
||||
ASSERT_NOT_NULL((condition = condition_new(CONDITION_CPU_FEATURE, "somecpufeaturethatreallydoesntmakesense", false, false)));
|
||||
ASSERT_OK_ZERO(condition_test(condition, environ));
|
||||
condition_free(condition);
|
||||
|
||||
Reference in New Issue
Block a user