Merge pull request #27629 from ddstreet/tpm2_verify_sym_params
Tpm2 verify sym params
This commit is contained in:
+217
-61
@@ -52,6 +52,7 @@ static TSS2_RC (*sym_Esys_PolicyPCR)(ESYS_CONTEXT *esysContext, ESYS_TR policySe
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static TSS2_RC (*sym_Esys_ReadPublic)(ESYS_CONTEXT *esysContext, ESYS_TR objectHandle, ESYS_TR shandle1, ESYS_TR shandle2, ESYS_TR shandle3, TPM2B_PUBLIC **outPublic, TPM2B_NAME **name, TPM2B_NAME **qualifiedName) = NULL;
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static TSS2_RC (*sym_Esys_StartAuthSession)(ESYS_CONTEXT *esysContext, ESYS_TR tpmKey, ESYS_TR bind, ESYS_TR shandle1, ESYS_TR shandle2, ESYS_TR shandle3, const TPM2B_NONCE *nonceCaller, TPM2_SE sessionType, const TPMT_SYM_DEF *symmetric, TPMI_ALG_HASH authHash, ESYS_TR *sessionHandle) = NULL;
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static TSS2_RC (*sym_Esys_Startup)(ESYS_CONTEXT *esysContext, TPM2_SU startupType) = NULL;
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static TSS2_RC (*sym_Esys_TestParms)(ESYS_CONTEXT *esysContext, ESYS_TR shandle1, ESYS_TR shandle2, ESYS_TR shandle3, const TPMT_PUBLIC_PARMS *parameters) = NULL;
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static TSS2_RC (*sym_Esys_TR_Deserialize)(ESYS_CONTEXT *esys_context, uint8_t const *buffer, size_t buffer_size, ESYS_TR *esys_handle) = NULL;
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static TSS2_RC (*sym_Esys_TR_FromTPMPublic)(ESYS_CONTEXT *esysContext, TPM2_HANDLE tpm_handle, ESYS_TR optionalSession1, ESYS_TR optionalSession2, ESYS_TR optionalSession3, ESYS_TR *object) = NULL;
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static TSS2_RC (*sym_Esys_TR_GetName)(ESYS_CONTEXT *esysContext, ESYS_TR handle, TPM2B_NAME **name) = NULL;
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@@ -98,6 +99,7 @@ int dlopen_tpm2(void) {
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DLSYM_ARG(Esys_ReadPublic),
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DLSYM_ARG(Esys_StartAuthSession),
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DLSYM_ARG(Esys_Startup),
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DLSYM_ARG(Esys_TestParms),
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DLSYM_ARG(Esys_TR_Deserialize),
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DLSYM_ARG(Esys_TR_FromTPMPublic),
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DLSYM_ARG(Esys_TR_GetName),
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@@ -133,6 +135,175 @@ static inline void Esys_Freep(void *p) {
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sym_Esys_Free(*(void**) p);
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}
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/* Get a specific TPM capability (or capabilities).
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*
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* Returns 0 if there are no more capability properties of the requested type, or 1 if there are more, or < 0
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* on any error. Both 0 and 1 indicate this completed successfully, but do not indicate how many capability
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* properties were provided in 'ret_capability_data'. To find the number of provided properties, check the
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* specific type's 'count' field (e.g. for TPM2_CAP_ALGS, check ret_capability_data->algorithms.count).
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*
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* This calls TPM2_GetCapability() and does not alter the provided data, so it is important to understand how
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* that TPM function works. It is recommended to check the TCG TPM specification Part 3 ("Commands") section
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* on TPM2_GetCapability() for full details, but a short summary is: if this returns 0, all available
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* properties have been provided in ret_capability_data, or no properties were available. If this returns 1,
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* there are between 1 and "count" properties provided in ret_capability_data, and there are more available.
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* Note that this may provide less than "count" properties even if the TPM has more available. Also, each
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* capability category may have more specific requirements than described here; see the spec for exact
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* details. */
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static int tpm2_get_capability(
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Tpm2Context *c,
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TPM2_CAP capability,
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uint32_t property,
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uint32_t count,
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TPMU_CAPABILITIES *ret_capability_data) {
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_cleanup_(Esys_Freep) TPMS_CAPABILITY_DATA *capabilities = NULL;
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TPMI_YES_NO more;
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TSS2_RC rc;
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assert(c);
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log_debug("Getting TPM2 capability 0x%04" PRIx32 " property 0x%04" PRIx32 " count %" PRIu32 ".",
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capability, property, count);
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rc = sym_Esys_GetCapability(
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c->esys_context,
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ESYS_TR_NONE,
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ESYS_TR_NONE,
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ESYS_TR_NONE,
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capability,
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property,
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count,
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&more,
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&capabilities);
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if (rc != TSS2_RC_SUCCESS)
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return log_error_errno(SYNTHETIC_ERRNO(ENOTRECOVERABLE),
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"Failed to get TPM2 capability 0x%04" PRIx32 " property 0x%04" PRIx32 ": %s",
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capability, property, sym_Tss2_RC_Decode(rc));
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if (capabilities->capability != capability)
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return log_error_errno(SYNTHETIC_ERRNO(ENOTRECOVERABLE),
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"TPM provided wrong capability: 0x%04" PRIx32 " instead of 0x%04" PRIx32 ".",
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capabilities->capability, capability);
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if (ret_capability_data)
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*ret_capability_data = capabilities->data;
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return more == TPM2_YES;
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}
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static int tpm2_cache_capabilities(Tpm2Context *c) {
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TPMU_CAPABILITIES capability;
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int r;
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assert(c);
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/* Cache the PCR capabilities, which are safe to cache, as the only way they can change is
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* TPM2_PCR_Allocate(), which changes the allocation after the next _TPM_Init(). If the TPM is
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* reinitialized while we are using it, all our context and sessions will be invalid, so we can
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* safely assume the TPM PCR allocation will not change while we are using it. */
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r = tpm2_get_capability(
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c,
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TPM2_CAP_PCRS,
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/* property= */ 0,
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/* count= */ 1,
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&capability);
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if (r < 0)
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return r;
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if (r == 1)
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/* This should never happen. Part 3 ("Commands") of the TCG TPM2 spec in the section for
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* TPM2_GetCapability states: "TPM_CAP_PCRS – Returns the current allocation of PCR in a
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* TPML_PCR_SELECTION. The property parameter shall be zero. The TPM will always respond to
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* this command with the full PCR allocation and moreData will be NO." */
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log_warning("TPM bug: reported multiple PCR sets; using only first set.");
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c->capability_pcrs = capability.assignedPCR;
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return 0;
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}
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#define tpm2_capability_pcrs(c) ((c)->capability_pcrs)
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/* Get the TPMA_ALGORITHM for a TPM2_ALG_ID.
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*
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* Returns 1 if the TPM supports the algorithm and the TPMA_ALGORITHM is provided, or 0 if the TPM does not
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* support the algorithm, or < 0 for any errors. */
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static int tpm2_get_capability_alg(Tpm2Context *c, TPM2_ALG_ID alg, TPMA_ALGORITHM *ret) {
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TPMU_CAPABILITIES capability;
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int r;
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assert(c);
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/* The spec explicitly states the TPM2_ALG_ID should be cast to uint32_t. */
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r = tpm2_get_capability(c, TPM2_CAP_ALGS, (uint32_t) alg, 1, &capability);
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if (r < 0)
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return r;
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TPML_ALG_PROPERTY algorithms = capability.algorithms;
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if (algorithms.count == 0 || algorithms.algProperties[0].alg != alg) {
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log_debug("TPM does not support alg 0x%02" PRIx16 ".", alg);
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return 0;
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}
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if (ret)
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*ret = algorithms.algProperties[0].algProperties;
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return 1;
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}
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/* Returns 1 if the TPM supports the alg, 0 if the TPM does not support the alg, or < 0 for any error. */
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int tpm2_supports_alg(Tpm2Context *c, TPM2_ALG_ID alg) {
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return tpm2_get_capability_alg(c, alg, NULL);
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}
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/* Returns 1 if the TPM supports the parms, or 0 if the TPM does not support the parms. */
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bool tpm2_test_parms(Tpm2Context *c, TPMI_ALG_PUBLIC alg, const TPMU_PUBLIC_PARMS *parms) {
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TSS2_RC rc;
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assert(c);
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assert(parms);
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TPMT_PUBLIC_PARMS parameters = {
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.type = alg,
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.parameters = *parms,
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};
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rc = sym_Esys_TestParms(c->esys_context, ESYS_TR_NONE, ESYS_TR_NONE, ESYS_TR_NONE, ¶meters);
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if (rc != TSS2_RC_SUCCESS)
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/* The spec says if the parms are not supported the TPM returns "...the appropriate
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* unmarshaling error if a parameter is not valid". Since the spec (currently) defines 15
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* unmarshaling errors, instead of checking for them all here, let's just assume any error
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* indicates unsupported parms, and log the specific error text. */
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log_debug("TPM does not support tested parms: %s", sym_Tss2_RC_Decode(rc));
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return rc == TSS2_RC_SUCCESS;
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}
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static inline bool tpm2_supports_tpmt_sym_def_object(Tpm2Context *c, const TPMT_SYM_DEF_OBJECT *parameters) {
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assert(c);
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assert(parameters);
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TPMU_PUBLIC_PARMS parms = {
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.symDetail.sym = *parameters,
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};
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return tpm2_test_parms(c, TPM2_ALG_SYMCIPHER, &parms);
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}
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static inline bool tpm2_supports_tpmt_sym_def(Tpm2Context *c, const TPMT_SYM_DEF *parameters) {
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assert(c);
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assert(parameters);
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/* Unfortunately, TPMT_SYM_DEF and TPMT_SYM_DEF_OBEJECT are separately defined, even though they are
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* functionally identical. */
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TPMT_SYM_DEF_OBJECT object = {
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.algorithm = parameters->algorithm,
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.keyBits = parameters->keyBits,
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.mode = parameters->mode,
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};
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return tpm2_supports_tpmt_sym_def_object(c, &object);
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}
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static Tpm2Context *tpm2_context_free(Tpm2Context *c) {
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if (!c)
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return NULL;
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@@ -148,6 +319,12 @@ static Tpm2Context *tpm2_context_free(Tpm2Context *c) {
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DEFINE_TRIVIAL_REF_UNREF_FUNC(Tpm2Context, tpm2_context, tpm2_context_free);
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static const TPMT_SYM_DEF SESSION_TEMPLATE_SYM_AES_128_CFB = {
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.algorithm = TPM2_ALG_AES,
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.keyBits.aes = 128,
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.mode.aes = TPM2_ALG_CFB, /* The spec requires sessions to use CFB. */
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};
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int tpm2_context_new(const char *device, Tpm2Context **ret_context) {
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_cleanup_tpm2_context_ Tpm2Context *context = NULL;
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TSS2_RC rc;
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@@ -255,6 +432,26 @@ int tpm2_context_new(const char *device, Tpm2Context **ret_context) {
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return log_error_errno(SYNTHETIC_ERRNO(ENOTRECOVERABLE),
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"Failed to start up TPM: %s", sym_Tss2_RC_Decode(rc));
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r = tpm2_cache_capabilities(context);
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if (r < 0)
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return r;
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/* We require AES and CFB support for session encryption. */
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r = tpm2_supports_alg(context, TPM2_ALG_AES);
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if (r < 0)
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return r;
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if (r == 0)
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return log_error_errno(SYNTHETIC_ERRNO(ENOTRECOVERABLE), "TPM does not support AES.");
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r = tpm2_supports_alg(context, TPM2_ALG_CFB);
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if (r < 0)
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return r;
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if (r == 0)
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return log_error_errno(SYNTHETIC_ERRNO(ENOTRECOVERABLE), "TPM does not support CFB.");
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if (!tpm2_supports_tpmt_sym_def(context, &SESSION_TEMPLATE_SYM_AES_128_CFB))
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return log_error_errno(SYNTHETIC_ERRNO(ENOTRECOVERABLE), "TPM does not support AES-128-CFB.");
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*ret_context = TAKE_PTR(context);
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return 0;
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@@ -1180,48 +1377,33 @@ static int tpm2_get_best_pcr_bank(
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uint32_t pcr_mask,
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TPMI_ALG_HASH *ret) {
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_cleanup_(Esys_Freep) TPMS_CAPABILITY_DATA *pcap = NULL;
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TPML_PCR_SELECTION pcrs;
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TPMI_ALG_HASH supported_hash = 0, hash_with_valid_pcr = 0;
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TPMI_YES_NO more;
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TSS2_RC rc;
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int r;
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assert(c);
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assert(ret);
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rc = sym_Esys_GetCapability(
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c->esys_context,
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ESYS_TR_NONE,
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ESYS_TR_NONE,
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ESYS_TR_NONE,
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TPM2_CAP_PCRS,
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0,
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1,
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&more,
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&pcap);
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if (rc != TSS2_RC_SUCCESS)
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return log_error_errno(SYNTHETIC_ERRNO(ENOTRECOVERABLE),
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"Failed to determine TPM2 PCR bank capabilities: %s", sym_Tss2_RC_Decode(rc));
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assert(pcap->capability == TPM2_CAP_PCRS);
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for (size_t i = 0; i < pcap->data.assignedPCR.count; i++) {
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pcrs = tpm2_capability_pcrs(c);
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FOREACH_TPMS_PCR_SELECTION_IN_TPML_PCR_SELECTION(selection, &pcrs) {
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TPMI_ALG_HASH hash = selection->hash;
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int good;
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/* For now we are only interested in the SHA1 and SHA256 banks */
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if (!IN_SET(pcap->data.assignedPCR.pcrSelections[i].hash, TPM2_ALG_SHA256, TPM2_ALG_SHA1))
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if (!IN_SET(hash, TPM2_ALG_SHA256, TPM2_ALG_SHA1))
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continue;
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r = tpm2_bank_has24(pcap->data.assignedPCR.pcrSelections + i);
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r = tpm2_bank_has24(selection);
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if (r < 0)
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return r;
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if (!r)
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continue;
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good = tpm2_pcr_mask_good(c, pcap->data.assignedPCR.pcrSelections[i].hash, pcr_mask);
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good = tpm2_pcr_mask_good(c, hash, pcr_mask);
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if (good < 0)
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return good;
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if (pcap->data.assignedPCR.pcrSelections[i].hash == TPM2_ALG_SHA256) {
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if (hash == TPM2_ALG_SHA256) {
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supported_hash = TPM2_ALG_SHA256;
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if (good) {
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/* Great, SHA256 is supported and has initialized PCR values, we are done. */
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@@ -1229,7 +1411,7 @@ static int tpm2_get_best_pcr_bank(
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break;
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}
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} else {
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assert(pcap->data.assignedPCR.pcrSelections[i].hash == TPM2_ALG_SHA1);
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assert(hash == TPM2_ALG_SHA1);
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if (supported_hash == 0)
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supported_hash = TPM2_ALG_SHA1;
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@@ -1278,42 +1460,26 @@ int tpm2_get_good_pcr_banks(
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TPMI_ALG_HASH **ret) {
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_cleanup_free_ TPMI_ALG_HASH *good_banks = NULL, *fallback_banks = NULL;
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_cleanup_(Esys_Freep) TPMS_CAPABILITY_DATA *pcap = NULL;
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TPML_PCR_SELECTION pcrs;
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size_t n_good_banks = 0, n_fallback_banks = 0;
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TPMI_YES_NO more;
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TSS2_RC rc;
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int r;
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assert(c);
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assert(ret);
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rc = sym_Esys_GetCapability(
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c->esys_context,
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ESYS_TR_NONE,
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ESYS_TR_NONE,
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ESYS_TR_NONE,
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TPM2_CAP_PCRS,
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0,
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1,
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&more,
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&pcap);
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if (rc != TSS2_RC_SUCCESS)
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return log_error_errno(SYNTHETIC_ERRNO(ENOTRECOVERABLE),
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"Failed to determine TPM2 PCR bank capabilities: %s", sym_Tss2_RC_Decode(rc));
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assert(pcap->capability == TPM2_CAP_PCRS);
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for (size_t i = 0; i < pcap->data.assignedPCR.count; i++) {
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pcrs = tpm2_capability_pcrs(c);
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FOREACH_TPMS_PCR_SELECTION_IN_TPML_PCR_SELECTION(selection, &pcrs) {
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TPMI_ALG_HASH hash = selection->hash;
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/* Let's see if this bank is superficially OK, i.e. has at least 24 enabled registers */
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r = tpm2_bank_has24(pcap->data.assignedPCR.pcrSelections + i);
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r = tpm2_bank_has24(selection);
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if (r < 0)
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return r;
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if (!r)
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continue;
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/* Let's now see if this bank has any of the selected PCRs actually initialized */
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r = tpm2_pcr_mask_good(c, pcap->data.assignedPCR.pcrSelections[i].hash, pcr_mask);
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r = tpm2_pcr_mask_good(c, hash, pcr_mask);
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if (r < 0)
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return r;
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@@ -1324,12 +1490,12 @@ int tpm2_get_good_pcr_banks(
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if (!GREEDY_REALLOC(good_banks, n_good_banks+1))
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return log_oom();
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good_banks[n_good_banks++] = pcap->data.assignedPCR.pcrSelections[i].hash;
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good_banks[n_good_banks++] = hash;
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} else {
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if (!GREEDY_REALLOC(fallback_banks, n_fallback_banks+1))
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return log_oom();
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fallback_banks[n_fallback_banks++] = pcap->data.assignedPCR.pcrSelections[i].hash;
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fallback_banks[n_fallback_banks++] = hash;
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}
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}
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@@ -1520,11 +1686,6 @@ static int tpm2_make_encryption_session(
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const Tpm2Handle *bind_key,
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Tpm2Handle **ret_session) {
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static const TPMT_SYM_DEF symmetric = {
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.algorithm = TPM2_ALG_AES,
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.keyBits.aes = 128,
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.mode.aes = TPM2_ALG_CFB,
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};
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const TPMA_SESSION sessionAttributes = TPMA_SESSION_DECRYPT | TPMA_SESSION_ENCRYPT |
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TPMA_SESSION_CONTINUESESSION;
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TSS2_RC rc;
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@@ -1552,7 +1713,7 @@ static int tpm2_make_encryption_session(
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ESYS_TR_NONE,
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NULL,
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TPM2_SE_HMAC,
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&symmetric,
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&SESSION_TEMPLATE_SYM_AES_128_CFB,
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TPM2_ALG_SHA256,
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&session->esys_handle);
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if (rc != TSS2_RC_SUCCESS)
|
||||
@@ -1581,11 +1742,6 @@ static int tpm2_make_policy_session(
|
||||
bool trial,
|
||||
Tpm2Handle **ret_session) {
|
||||
|
||||
static const TPMT_SYM_DEF symmetric = {
|
||||
.algorithm = TPM2_ALG_AES,
|
||||
.keyBits.aes = 128,
|
||||
.mode.aes = TPM2_ALG_CFB,
|
||||
};
|
||||
TPM2_SE session_type = trial ? TPM2_SE_TRIAL : TPM2_SE_POLICY;
|
||||
TSS2_RC rc;
|
||||
int r;
|
||||
@@ -1615,7 +1771,7 @@ static int tpm2_make_policy_session(
|
||||
ESYS_TR_NONE,
|
||||
NULL,
|
||||
session_type,
|
||||
&symmetric,
|
||||
&SESSION_TEMPLATE_SYM_AES_128_CFB,
|
||||
TPM2_ALG_SHA256,
|
||||
&session->esys_handle);
|
||||
if (rc != TSS2_RC_SUCCESS)
|
||||
|
||||
@@ -67,6 +67,9 @@ typedef struct {
|
||||
void *tcti_dl;
|
||||
TSS2_TCTI_CONTEXT *tcti_context;
|
||||
ESYS_CONTEXT *esys_context;
|
||||
|
||||
/* Some selected cached capabilities of the TPM */
|
||||
TPML_PCR_SELECTION capability_pcrs;
|
||||
} Tpm2Context;
|
||||
|
||||
int tpm2_context_new(const char *device, Tpm2Context **ret_context);
|
||||
@@ -89,6 +92,10 @@ Tpm2Handle *tpm2_handle_free(Tpm2Handle *handle);
|
||||
DEFINE_TRIVIAL_CLEANUP_FUNC(Tpm2Handle*, tpm2_handle_free);
|
||||
#define _cleanup_tpm2_handle_ _cleanup_(tpm2_handle_freep)
|
||||
|
||||
int tpm2_supports_alg(Tpm2Context *c, TPM2_ALG_ID alg);
|
||||
|
||||
bool tpm2_test_parms(Tpm2Context *c, TPMI_ALG_PUBLIC alg, const TPMU_PUBLIC_PARMS *parms);
|
||||
|
||||
int tpm2_get_good_pcr_banks(Tpm2Context *c, uint32_t pcr_mask, TPMI_ALG_HASH **ret_banks);
|
||||
int tpm2_get_good_pcr_banks_strv(Tpm2Context *c, uint32_t pcr_mask, char ***ret);
|
||||
|
||||
|
||||
@@ -760,6 +760,44 @@ TEST(calculate_policy_pcr) {
|
||||
assert_se(digest_check(&d, "7481fd1b116078eb3ac2456e4ad542c9b46b9b8eb891335771ca8e7c8f8e4415"));
|
||||
}
|
||||
|
||||
TEST(tpm_required_tests) {
|
||||
int r;
|
||||
|
||||
_cleanup_tpm2_context_ Tpm2Context *c = NULL;
|
||||
r = tpm2_context_new(NULL, &c);
|
||||
if (r < 0) {
|
||||
log_tests_skipped("Could not find TPM");
|
||||
return;
|
||||
}
|
||||
|
||||
TPMU_PUBLIC_PARMS parms = {
|
||||
.symDetail.sym = {
|
||||
.algorithm = TPM2_ALG_AES,
|
||||
.keyBits.aes = 128,
|
||||
.mode.aes = TPM2_ALG_CFB,
|
||||
},
|
||||
};
|
||||
|
||||
/* Test with invalid parms */
|
||||
assert_se(!tpm2_test_parms(c, TPM2_ALG_CFB, &parms));
|
||||
|
||||
TPMU_PUBLIC_PARMS invalid_parms = parms;
|
||||
invalid_parms.symDetail.sym.keyBits.aes = 1;
|
||||
assert_se(!tpm2_test_parms(c, TPM2_ALG_SYMCIPHER, &invalid_parms));
|
||||
|
||||
/* Test with valid parms */
|
||||
assert_se(tpm2_test_parms(c, TPM2_ALG_SYMCIPHER, &parms));
|
||||
|
||||
/* Test invalid algs */
|
||||
assert_se(tpm2_supports_alg(c, TPM2_ALG_ERROR) == 0);
|
||||
assert_se(tpm2_supports_alg(c, TPM2_ALG_LAST + 1) == 0);
|
||||
|
||||
/* Test valid algs */
|
||||
assert_se(tpm2_supports_alg(c, TPM2_ALG_RSA) == 1);
|
||||
assert_se(tpm2_supports_alg(c, TPM2_ALG_AES) == 1);
|
||||
assert_se(tpm2_supports_alg(c, TPM2_ALG_CFB) == 1);
|
||||
}
|
||||
|
||||
#endif /* HAVE_TPM2 */
|
||||
|
||||
DEFINE_TEST_MAIN(LOG_DEBUG);
|
||||
|
||||
Reference in New Issue
Block a user