A 10G Marvell AQC113 included in an ASRock TRX50WS motherboard NIC claims to support tx/rx queues as large as 8184. After boot 'ethtool -g eth0' outputs: Ring parameters for eth0: RX: 8184 RX Mini: n/a RX Jumbo: n/a TX: 8184 TX push buff len: n/a HDS thresh: n/a RX: 2048 RX Mini: n/a RX Jumbo: n/a TX: 4096 RX Buf Len: n/a CQE Size: n/a TX Push: off RX Push: off TX push buff len: n/a TCP data split: n/a HDS thresh: n/a 'ethtool --set-ring eth0 rx 8184 tx 8184 && ethtool -g eth0' yields: Ring parameters for eth0: RX: 8184 RX Mini: n/a RX Jumbo: n/a TX: 8184 TX push buff len: n/a HDS thresh: n/a RX: 8184 RX Mini: n/a RX Jumbo: n/a TX: 8184 RX Buf Len: n/a CQE Size: n/a TX Push: off RX Push: off TX push buff len: n/a TCP data split: n/a HDS thresh: n/a I can measure a throughput difference between using using buffer sizes 4096 and 8184 on my hardware, so it really seems that this is doing something beyond buggy firmware. Original PR https://github.com/systemd/systemd/pull/17635 didn't give any explanation for the limit of 4096, but that's probably what was supported by the kernel drivers at the time. A web search shows that CISCO VIC 15000 supports 16k, so allow up to that. [zjs: edited the message]
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